1. Field of the Invention
The present invention relates to a semiconductor memory module wherein semiconductor chips are mounted on a module substrate.
2. Description of the Background Art
A semiconductor memory device is, in many cases, utilized in a personal computer, a workstation or the like. In addition, in recent years the speed, degree of compactness and number of functions of personal computers have been increased and, therefore, semiconductor memory devices have been required to further increase their memory capacity. In addition, the market has expanded so that a large number of low-cost memory devices are used. Therefore, further increase in the capacity of and further reduction in costs of semiconductor memory devices have become required.
The number of DRAMs (Dynamic Random Access Memory), from among the above described semiconductor memory devices, utilized in personal computers or the like has increased because it is advantageous from the point of view of cost per unit bit. Cost per bit unit can be reduced by increasing the diameter of wafers even in the case that the capacity is increased and, therefore, DRAMs are frequently utilized.
In a DRAM, however, cost of development, cost for high level institutions and the like have greatly increased together with the increase in the testing period of time and test costs accompanying the increase in capacity as well as the enhancement of microscopic processing technology so that whether or not those costs can be reduced has become a problem.
The bit configuration for the input to or output from a DRAM is conventionally 4 bits, 8 bits or 16 bits. Accordingly, the variety in types of bit numbers of a DRAM is small. Therefore, one module is normally made up of a plurality of DRAMs for general utilization. Thus, a semiconductor memory device such as a DRAM is, in many cases, utilized in a module condition.
FIGS. 31 and 32 show a conventional semiconductor memory module. The conventional semiconductor memory module has a structure, wherein single chips 117, in which bare chips 101, mounting islands 104, bonding wires 105 and lead frames 110 are molded into mold resins 108, are mounted on a module substrate 102, such as of an SOP (Small Outline Package) or a TSOP (Thin Small Outline Package) corresponding to a surface mounting technology wherein parts can be mounted on both sides of a printed circuit board.
In addition, development has progressed of a memory package having a basic tendency toward miniaturization and thinning together with enhancement of performance and of functions of a memory chip. Then, though an insertion system has been adopted for a memory package, in recent years the forms of packages have greatly changed such that a surface mounting system has started to be adopted.
At present, the surface mounting system has become the main trend in place of the insertion system and further miniaturization and lightening of a package are strongly required. Up to the present, simplification of design and increase in reliability, as well as reduction in cost, have been achieved by utilizing a semiconductor memory module.
In addition, in a conventional manufacturing process of a semiconductor memory module, in the case that a defective chip is discovered in a module test after the manufacture of a semiconductor memory module, testing and replacement of such a defective chip are carried out until such defect has been removed.
There is a problem wherein a great amount of time and effort are required for the above described replacement of a memory chip that has been detected as being defective according to the conventional manufacturing process of a semiconductor memory module. Though there is a memory module in the form of a COB (Chip On Board) as a semiconductor memory module for solving this problem, a bare chip that has been detected as being defective cannot be replaced with a new good bare chip after bare chips have been sealed into a mold according to the conventional module in the form of the COB. Therefore, there is a problem wherein the memory module in the form of the COB cannot be repaired after the bare chips have been sealed into the mold.
An object of the present invention is to provide a semiconductor memory module wherein, even in the case that a semiconductor chip is detected as being defective after semiconductor chips are mounted on a module substrate, semiconductor chips other than the semiconductor chip that has become defective from among the plurality of semiconductor chips are effectively utilized and the semiconductor chip that has become defective can be repaired by newly mounting a good function chip (nondefective chip; The chip function without any problem in usual use) without interfering with the functions of the semiconductor memory module.
In order to achieve the above described object, it is necessary to prevent the semiconductor chip that has been detected as being defective from interfering with the input/output of data to/from the good chip for repair when operating. Therefore, the semiconductor chip that has been detected as being defective must be converted to the deactivated condition. Then, the semiconductor memory modules according to the respective aspects of the present invention shown below allow the semiconductor chips to be converted to the deactivated condition. In the following, the semiconductor memory modules of the respective aspects of the present invention that can achieve the above described object will be described.
A semiconductor memory module of the first aspect of the present invention has the following structure. The semiconductor memory module has semiconductor chips mounted on a module substrate. In addition, data input/output parts are electrically connected to the semiconductor chips so that the data input/output parts input/output data to/from the semiconductor chips. In addition, the semiconductor memory module is provided with a deactivated condition signal input part that allows the input of a deactivated condition signal indicating conversion to the deactivated condition wherein data inputted from a data input/output part is not inputted to a data memory region of a semiconductor chip. In addition, a circuit for activation/deactivation control is provided within a semiconductor chip for carrying out conversion to the deactivated condition in the case that a deactivated condition signal is inputted from a deactivated condition signal input part. A plurality of units having data input/output parts, deactivated condition signal input parts and circuits for activation/deactivation control is mounted on the module substrate. The plurality of semiconductor chips includes a plurality of bare chips. In addition, the plurality of bare chips is integrally covered with a mold resin on the module substrate. In addition, the deactivated condition signal input parts are provided outside of the mold resin.
According to the above described configuration, the semiconductor chips can be converted to the deactivated condition by inputting a deactivated condition signal from the deactivated condition signal input parts after the semiconductor chips are mounted on the module substrate.
A semiconductor memory module of the second aspect of the present invention has the following structure. The semiconductor memory module has semiconductor chips mounted on a module substrate. A self-refresh determination circuit that determines whether or not self-refreshing is carried out and that outputs a first signal in the case that it has been determined to carry out self-refreshing is provided within a semiconductor chip. In addition, the semiconductor memory module is provided with a signal input part that allows the input of a second signal different from the first signal. Furthermore, a self-refresh signal output circuit for outputting a self-refresh signal indicating a semiconductor chip to be self-refreshed in at least one case among the cases where a first signal is inputted and where a second signal is inputted is provided within the semiconductor chip. A plurality of units having self-refresh determination circuits, signal input parts and self-refresh signal output circuits is mounted on the module substrate.
According to the above described configuration, a semiconductor chip can be self-refreshed by inputting a second signal from the signal input part. Accordingly, a semiconductor chip can be self-refreshed after the semiconductor chips are mounted on the module substrate. That is to say, a semiconductor chip can be converted to the deactivated condition after the semiconductor chips have been mounted on the module substrate.
A semiconductor memory module of the third aspect of the present invention has the following structure. The semiconductor memory module has semiconductor chips mounted on a module substrate. A data input/output part for inputting/outputting data to/from a semiconductor chip is electrically connected to the semiconductor chip. In addition, the semiconductor memory module is provided with a fuse for activation/deactivation control that can select whether a semiconductor chip has been converted to the activated condition or has been converted to the deactivated condition according to the mode of being blown or according to the mode of remaining unblown. In addition, the semiconductor memory module is provided, inside of a semiconductor chip, with a circuit for activation/deactivation control that carries out conversion to the deactivated condition wherein data inputted from a data input/output part is not allowed to be inputted to the data memory region of the semiconductor chip according to the mode of the fuse for activation/deactivation control. A plurality of units having data input/output parts, fuses for activation/deactivation control and circuits for activation/deactivation control is mounted on the module substrate.
According to the above described configuration, a semiconductor chip can be selected as being in the activated condition or as being in the deactivated condition according to whether or not a fuse for activation/deactivation control is blown.
A semiconductor memory module of the fourth aspect of the present invention has the following structure. The semiconductor memory module has semiconductor chips mounted on a module substrate. In addition, the semiconductor memory module of the fourth aspect of the present invention is provided with a fuse for self-refresh control that can select whether or not a semiconductor chip is self-refreshed according to the mode of being blown or according to the mode of remaining unblown. In addition, a self-refresh determination circuit that determines whether or not self-refreshing is to be carried out and that outputs a predetermined signal in the case it is determined that self-refreshing is to be carried out is provided inside of a semiconductor chip. In addition, the semiconductor memory module is provided with a self-refresh indication circuit, inside of a semiconductor chip, for outputting a signal that indicates that a semiconductor chip is to be self-refreshed in at least one case from among the cases where the self-refresh determination circuit outputs a predetermined signal and where a fuse for self-refresh control carries out self-refresh on the semiconductor chip. A plurality of units having fuses for self-refresh control, self-refresh determination circuits and self-refresh indication circuits is mounted on the module substrate.
According to the above described configuration, whether or not a semiconductor chip is converted to a self-refreshed condition can be selected according to whether or not the fuse for activation/deactivation control is blown. As a result, whether the semiconductor chip is to be converted to the activated condition or is to be converted to the deactivated condition can be selected.
A semiconductor memory module of the fifth aspect of the present invention has the following structure. The semiconductor memory module has semiconductor chips mounted on the main surface of a module substrate. In addition, a good function chip mounting region wherein a good function chip that functions so as to substitute for a semiconductor chip can be mounted is provided on the module substrate. In addition, the semiconductor memory module is provided with a signal input part that is electrically connected to a fixed potential terminal, wherein the potential is fixed, and to which a predetermined signal is inputted. In addition, the semiconductor memory module is provided with a semiconductor chip internal circuit that converts the semiconductor chip to the deactivated condition in the case that the predetermined signal is inputted from the signal input part. A plurality of units having good chip mounting regions, signal input parts and semiconductor chip internal circuits is mounted on the module substrate.
In addition, the above described fixed potential terminal is provided in a good function chip. In addition, an electrical wire is provided on the module substrate so that the fixed potential terminal and the signal input part are electrically connected in the condition wherein the good chip is mounted in the good chip mounting provision region.
According to the above described configuration, a semiconductor chip that has been detected as being defective can be converted to the deactivated condition by electrically connecting the fixed potential terminal to the signal input part because a semiconductor chip internal circuit is provided. In addition, the module substrate is provided with an electrical wire for electrically connecting the fixed potential terminal to the signal input part in the condition wherein a good function chip is mounted in the good chip mounting region and, therefore, it is only necessary to mount a good function chip in order to repair the semiconductor memory module. Accordingly, the semiconductor memory module can easily be repaired.
A semiconductor memory module of the sixth aspect of the present invention has the following structure. The semiconductor memory module has a plurality of semiconductor chips mounted on a module substrate. In addition, the plurality of semiconductor chips is electrically connected to a common power supply electrode. In addition, a plurality of disconnectable wires makes electrical connections between two or more semiconductor chips from among the plurality of semiconductor chips and the power supply electrode. In addition, the semiconductor memory module is provided with a data input/output circuit for allowing data to be inputted/outputted, in the case that a specific semiconductor chip from among the plurality of semiconductor chips has been detected as being defective, by using semiconductor chips other than the specific semiconductor chip.
According to the above described configuration, a disconnectable wire is cut so that power can be stopped from being supplied to the semiconductor chip to which the wire was electrically connected. Therefore, the semiconductor chip that has been detected as being defective and the power supply electrode are electrically disconnected. Thereby, it becomes possible to convert the bare chip to the deactivated condition.
A semiconductor memory module of the seventh aspect of the present invention has the following structure. The semiconductor memory module has semiconductor chips mounted on a module substrate. In addition, the module substrate is provided with a plurality of terminals for substrate data input/output electrically connected to a plurality of terminals for chip data input/output for inputting/outputting data to/from the semiconductor chips in a one-to-one manner. In addition, a plurality of resistance elements makes electrical connections in a one-to-one manner between the plurality of terminals for substrate data input/output and the plurality of terminals for chip data input/output. A plurality of units having a plurality of terminals for chip data input/output, a plurality of terminals for substrate data input/output and a plurality of resistance elements are mounted on the module substrate. Furthermore, the plurality of resistance elements is formed so as to be removable from the semiconductor memory module.
According to the above described configuration, the plurality of resistance elements are removed from the semiconductor memory module, thereby data can be prevented from being inputted to/outputted from the semiconductor chips to which the plurality of resistance elements is electrically connected. Thereby, it becomes possible to convert the semiconductor chips to the deactivated condition.
A semiconductor memory module of the eighth aspect of the present invention has the following structure. The semiconductor memory module has semiconductor chips mounted on a module substrate. In addition, a semiconductor chip is provided with a chip clock terminal to which a clock signal that chronographically repeats the same status change is inputted. In addition, the module substrate is provided with a substrate clock terminal to which the clock signal is inputted. In addition, a first resistance element makes an electrical connection between the chip clock terminal and the substrate clock terminal. A plurality of units having chip clock terminals, substrate clock terminals and first resistance elements is provided on the module substrate. Furthermore, the first resistance elements are formed so as to be removable from the semiconductor memory module of the eighth aspect.
According to the above described configuration, a first resistance element is removed from the semiconductor memory module so that the clock signal that has been inputted via the first resistance element is not inputted to the semiconductor chip. Thereby, the semiconductor chip that has been detected as being defective can be converted to the deactivated condition.
Here, it is possible to appropriately combine the respective characteristics of the above described semiconductor memory modules of the first to eighth aspects if necessary.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.